1. Technical Field
The present specification discloses a semiconductor device in which a plurality of semiconductor elements is sealed in a molding resin in an integrated manner.
2. Description of Related Art
Japanese Patent Application Publication No. 2012-235081 (JP 2012-235081 A) discloses semiconductor devices in which two semiconductor elements are sealed in a molding resin in an integrated manner, i.e., a semiconductor device in which two semiconductor elements are connected in series in a molding resin, and a semiconductor device in which two semiconductor elements are connected in parallel in a molding resin.
In the technique of JP 2012-235081 A, at the time when two semiconductor elements are placed adjacent to each other, a back-surface electrode plate that makes contact with back-surface electrodes of the semiconductor elements, and a front-surface electrode plate that makes contact with front-surface electrodes of the semiconductor elements are used. In a case where a semiconductor device in which two semiconductor elements are connected in parallel is manufactured, an assembly in which respective back-surface electrodes are connected to each other via the back-surface electrode plate and respective front-surface electrodes are connected to each other via the front-surface electrode plate is packaged with a molding resin. In a case where a semiconductor device in which two semiconductor elements are connected in series, the front-surface electrode plate and the back-surface electrode plate of the assembly in the above state are partially cut and deformed in such a shape that the front-surface electrode plate of one of the semiconductor elements makes contact with the back-surface electrode plate of the other one of the semiconductor elements, and the assembly thus deformed is packaged with a molding resin.